*************************************************************************
* Program for Running Light on LED Row of Dragon 12 Eval Board *
* LED Row is connected to PORT B *
* To turn on the port B LEDs, PJ1 must be an output & set for logic 0 *
* The lower 4 bits of Port P control the LED mutiplexing (neg. Logic) *
* The common bus for the 7 Segment LEDs is also connected to Port B *
* To avoid turning on Segments on the LEDs, all Digits are turned off *
* Written for Dragon 12 Eval Board *
* Written for MiniIde Assembler, Sep. 23, 2008, by Dr.M. Giesselmann *
*************************************************************************
PORTB EQU $01 ;Port B I/O Data Register
DDRB EQU $03 ;Port B Data Direction Register
PTP EQU $258 ;Port P I/O Data Register
DDRP EQU $25A ;Port P Data Direction Register
PTJ EQU $268 ;Port J I/O Data Register
DDRJ EQU $26A ;Port J Data Direction Register
DELAY EQU 125 ;Define Delay in ms for Animation Speed
*************************************
* Register Constants (Clock) *
*************************************
Eclock EQU 24000000 ;24 MHz CPU Frequency
Loops1ms EQU (Eclock/6/1000)-4;Number of Loops for 1.0ms @ 6 cycles per loop
* ;Reduce Number of Loops by 2&2 for Overhead
************************************
* Start (ORIGIN) of Code in Memory *
************************************
ORG $1000 ;Origin=Bottom of RAM
*************************
* User Code starts here *
*************************
Init: BSET DDRP, $0F ;Make Low Nibble of Port P all Outputs
BSET PTP, $0F ;Turn all LED Digits off
MOVB #$FF, DDRB ;Make all Bits of Port B Outputs
MOVB #$80, PORTB ;Turn on MSB LED on PORT B
BSET DDRJ, #$02 ;Make Bit 2 of Port J Output
BCLR PTJ, #$02 ;Enable LED Row
Right: LSR PORTB ;Right Shift Bits in PORT B
BSR TimDel ;Call Time Delay Subroutine
LDAA PORTB ;Load Accu A with contents of PORT B
CMPA #$01 ;Compare with BitMask %0000,0001
BNE Right ;Continue to Shift Right if LSB not reached
Left: LSL PORTB ;Left Shift Bits in PORT B
BSR TimDel ;Call Time Delay Subroutine
LDAA PORTB ;Load Accu A with contents of PORT B
CMPA #$80 ;Compare with BitMask %1000,0000
BNE Left ;Continue to Shift Right if MSB not reached
BRA Right ;Start back at the Beginning
*********************************************************
* Time Delay Subroutine, 12 Cycles Overhead inner loop *
*********************************************************
TimDel: PSHX ;Push X onto stack to preserve it, 2 Cycles
LDX #DELAY ;Load X with number of Loops for 1ms, 2 Cycles
Loop: BSR OneMS ;Call 1ms Delay Routine, 4 cycles
NOP ;No Operation, padd loop with 1 cycle
NOP ;No Operation, padd loop with 1 cycle
NOP ;No Operation, padd loop with 1 cycle
NOP ;No Operation, padd loop with 1 cycle
NOP ;No Operation, padd loop with 1 cycle
DBNE X, Loop ;Decrement X and Branch to LoopX if X>0, 3 cycles
PULX ;Restore X from Stack, 3 Cycles
RTS ;Return from Time Delay Subroutine, 5 Cycles
*********************************************************
* 1.0 ms Time Delay Subroutine, 12 Cycles Overhead *
*********************************************************
OneMS: PSHX ;Push X onto stack to preserve it, 2 Cycles
LDX #Loops1ms ;Load X with number of Loops for 1ms, 2 Cycles
LoopX: NOP ;No Operation, padd loop with 1 cycle
NOP ;No Operation, padd loop with 1 cycle
NOP ;No Operation, padd loop with 1 cycle
DBNE X, LoopX ;Decrement X and Branch to LoopX if X>0, 3 Cycles
PULX ;Restore X from Stack, 3 Cycles
RTS ;Return from Time Delay Subroutine, 5 Cycles
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