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Interrupts

Tue, 09/30/2008 - 11:39 — mpare

Real Time Interrupt (RTI)

The RTI can be used to generate a hardware interrupt at a fixed periodic rate. If enabled (by setting RTIE=1), this interrupt will occur at the rate selected by the RTICTL register. The RTI timer runs with OSCCLK. See Figure 40. The RTIF bit is set to one at the end of the RTI time-out period.

When coming out of reset, all the interrupts are disabled. This is done because the interrupts use the stack, so we have to set up the stack first before we should initialize the stack. We don't know when in a routine that a RTI will call the interrupt subroutine so we must have a functioning stack or else all hell will break loose.

$$RTI \; Timeout = \frac{Clock \; Speed}{1024 \cdot 2^{RTR[6:4]-1}} \bmod RTR[3:0]$$

Interrupt Mask

This essentially tells the processor that you are doing something important and don't want to be interrupted. Just by setting the IRQ interrupt mask high in the CCR (Condition Control Register) will place a "Do not distrub" sign. But ocassionally there will be something so important, maybe an emergency, that can bypass the IRQ Interrupt mask, it is the XIRG Interrupt formally known as the non-maskable interrupt. Once you turn XIRQ on (high) you can't turn it off again my software, it will require a hardware reset or something.

Example Program Using RTI

  1. *************************************************************************
  2. *Program counts 4 HEX-Bytes and diplays the Output on 7-Segment Display *
  3. *	  Program uses Real Time Interrupt for Diplay Routine		*
  4. *    A Common Cathode,  4 Digit LED Display is connected to Port B	*
  5. *The lower 4 Bits of Port P is used to multiplex the Display (neg Logic)*
  6. *  Only the Low Nibble of PORT P is written to by the Display Routine	*
  7. *	 	   Written for Dragon 12 Eval Board        		*
  8. *   Written for MiniIde Assembler, Mar. 13, 2008, by Dr. M. Giesselmann	*
  9. *************************************************************************
  10.  
  11. *********************************
  12. * 	9S12 Register Equates 	*
  13. *********************************
  14. PORTA	EQU	$00	;Port A I/O Data		Register
  15. PORTB	EQU	$01	;Port B I/O Data		Register
  16. DDRA	EQU	$02	;Port A Data Direction		Register
  17. DDRB	EQU	$03	;Port B Data Direction		Register
  18.  
  19. CRGFLG	EQU	$37	;CRG Flags 			Register
  20. CRGINT	EQU	$38	;CRG Interrupt Enable		Register
  21. RTICTL	EQU	$3B	;CRG RTI Control		Register
  22.  
  23. PTP	EQU	$258	;Port P I/O Data		Register
  24. DDRP	EQU	$25A	;Port P Data Direction		Register
  25. UserRTI	EQU	$3E70	;RTI RAM Interrupt Vector;	see D-Bug 12 Manual
  26.  
  27. DELAY	EQU	$0500	;Delay loop max count
  28.  
  29. ************************************
  30. * Start (ORIGIN) of Code in Memory *
  31. ************************************
  32. 	ORG	$1000	;Origin=Bottom of User RAM
  33.  
  34. ***********************************************
  35. * User Code (4-Digit HEX Counter) starts here *
  36. ***********************************************
  37. Start:	BSET  	DDRB,$FF	;Make Port B all Outputs
  38. 	BSET  	DDRP,$0F	;Make Low Nibble of Port P all Outputs
  39. 	BSET	PTP,$0F		;Turn all Digits off
  40.  
  41. RTIon:	MOVW	#IntRpt,UserRTI	;Setup Address for RTI Interrupt
  42. 	BSET	RTICTL,$50	;Set RTI Timeout
  43. 	BSET  	CRGINT,$80	;Enable RTI
  44. 	CLI			;Clear Interrupt Masking Bit, Interrupts enabled
  45.  
  46. InitC:	LDD	#$0000		;Load $0000 into Accu D
  47. 	STD	Count		;Store Accu D at Count
  48.  
  49. CLoop:	JSR	TimDel		;Jump to Time Delay Subroutine
  50. 	LDD	Count		;Load Accu D with Count
  51. 	ADDD	#$0001		;Increment Count
  52. 	STD	Count		;Store Double Accu into Count	
  53. 	BRA	CLoop		;Branch back to CLoop
  54.  
  55.  
  56. *************************************************
  57. *  RTI Interrupt Service Routine starts here 	*
  58. *  Purpose: Multiplexing of LED Digits		*
  59. *  First determine which Digit is currently on	*
  60. *  Then turn on the next Digit in the Sequence	*
  61. *  Afterwards determine the Hex Character that	*
  62. *  needs to be displayed on that Digit, lookup	*
  63. *  its Hex Code from Table & put it on Port B	*
  64. *************************************************
  65. IntRpt:	LDAA	PTP		;Load PORT P contents into Accu A
  66. 	BSET	PTP,$0F		;Turn all Digits off
  67. 	ANDA	#$0F		;Mask Out Lower Nibble 
  68. 	CMPA	#$0E		;Compare Accu A with $0E 0000|1110; Digit 4
  69. 	BEQ	Digit3		;Branch to Digit3 if equal
  70. 	CMPA	#$0D		;Compare Accu A with $0D 0000|1101; Digit 3
  71. 	BEQ	Digit2		;Branch to Digit2 if equal
  72. 	CMPA	#$0B		;Compare Accu A with $0B 0000|1011; Digit 2
  73. 	BEQ	Digit1		;Branch to Digit1 if equal
  74. 				;Accu A must be 0000|0111
  75.  
  76. Digit4:	BCLR	PTP,$01		;Turn Digit 4 ON; 0000|1110
  77. 	LDAB	Count		;Load Accu B with Count
  78. 	LSRB			;Shift to Lower Nibble Pos
  79. 	LSRB			;Shift to Lower Nibble Pos
  80. 	LSRB			;Shift to Lower Nibble Pos
  81. 	LSRB			;Shift to Lower Nibble Pos
  82. 	BRA	Show		;Branch to Show Label
  83.  
  84. Digit3:	BCLR	PTP,$02		;Turn Digit 3 ON; 0000|1101
  85. 	LDAB	Count		;Load Accu B with Count
  86. 	ANDB	#$0F		;Mask out Digit 3
  87. 	BRA	Show		;Branch to Show Label
  88.  
  89. Digit2:	BCLR	PTP,$04		;Turn Digit 2 ON; 0000|1011
  90. 	LDAB	Count+1		;Load Accu B with Count+1
  91. 	LSRB			;Shift to Lower Nibble Pos
  92. 	LSRB			;Shift to Lower Nibble Pos
  93. 	LSRB			;Shift to Lower Nibble Pos
  94. 	LSRB			;Shift to Lower Nibble Pos
  95. 	BRA	Show		;Branch to Show Label	
  96.  
  97. Digit1:	BCLR	PTP,$08		;Turn Digit 1 ON; 0000|0111
  98. 	LDAB	Count+1		;Load Accu B with Count+1
  99. 	ANDB	#$0F		;Mask out Digit 1
  100.  
  101. Show:	LDX	#SegCde		;Load start of Code Lookup table into X
  102. 	MOVB	B,X,PORTB	;Put 7_seg Code to Port B
  103. 	BSET	CRGFLG,$80	;Reset RTI-Flag
  104. 	RTI			;Return from Interrupt
  105.  
  106. *******************************************
  107. * Time Delay Subroutine with nested Loops *
  108. *******************************************
  109. TimDel:	PSHX			;Push X onto Stack
  110. 	PSHY			;Push Y onto Stack
  111. 	LDY	#DELAY		;Load Y Register with DELAY
  112. LoopX:	LDX	#DELAY		;Load X Register with DELAY
  113. DecX:	DEX			;Decrement X Register
  114. 	BNE	DecX		;Branch if DELAY limit has not been reached
  115. 	DEY			;Decrement Y Register
  116. 	BNE	LoopX		;Branch if DELAY limit has not been reached
  117. 	PULY			;Restore Y from Stack
  118. 	PULX			;Restore X from Stack
  119. 	RTS			;Return from TimDel Subroutine
  120.  
  121. *******************************************
  122. *     Place for Variables in Memory       *
  123. *******************************************
  124. Count:	RMB	2		;Reserve 2 Bytes of Memory for Count
  125.  
  126.  
  127. *Definition of symbols
  128. *  0  1  2  3   4   5   6  7   8   9   A   b   C   d  E  F
  129. *  -     -  -       -   -  -   -   -   -       -      -  -
  130. * | | |   |  | | | |   |    | | | | | | | |   |    | |  |
  131. *        -  -   -   -   -      -   -   -   -      -   -  -
  132. * | | | |    |   |   | | |  | | |   | | | | | |  | | |  |
  133. *  -     -  -       -   -      -   -       -   -  -   -
  134.  
  135.  
  136. *********************************
  137. * Set up Symbol Table in Memory *
  138. *********************************
  139. SegCde:	FCB	$3F		;$3F = Code for 0
  140. 	FCB	$06		;$06 = Code for 1
  141. 	FCB	$5B		;$5B = Code for 2
  142. 	FCB	$4F		;$4F = Code for 3
  143. 	FCB	$66		;$66 = Code for 4
  144. 	FCB	$6D		;$6D = Code for 5
  145. 	FCB	$7D		;$7D = Code for 6
  146. 	FCB	$07		;$07 = Code for 7
  147. 	FCB	$7F		;$7F = Code for 8
  148. 	FCB	$6F		;$6F = Code for 9
  149. 	FCB	$77		;$77 = Code for A
  150. 	FCB	$7C		;$7C = Code for B
  151. 	FCB	$39		;$39 = Code for C
  152. 	FCB	$5E		;$5E = Code for D
  153. 	FCB	$79		;$79 = Code for E
  154. 	FCB	$71		;$71 = Code for F

AttachmentSize
RTI Rates.xls143 KB

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